Formal Verification of Structurally Complex Multipliers
Alireza Mahzoon
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Logic Locking : A Practical Approach to Secure Hardware
Dominik Sisejkovic
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Automatisierte Analyse von virtuellen Prototypen auf der Ebene elektronischer Systeme : Design, Verstandnis und Anwendungen
Mehran Goli
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Multiprocessor Systems on Chip : Design Space Exploration
Torsten Kempf
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C Compilers for ASIPs : Automatic Compiler Generation with LISA
Manuel Hohenauer
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High Quality Test Pattern Generation and Boolean Satisfiability
Stephan Eggersgluss
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Design Automation Techniques for Approximation Circuits : Verification, Synthesis and Test
Arun Chandrasekharan
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Exact Design of Digital Microfluidic Biochips
Oliver Keszocze
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In-Memory Computing : Synthesis and Optimization
Saeideh Shirinzadeh
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Automated Analysis of Virtual Prototypes at the Electronic System Level : Design Understanding and Applications
Mehran Goli
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Automated Analysis of Virtual Prototypes at the Electronic System Level : Design Understanding and Applications
Mehran Goli
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Enhanced Virtual Prototyping : Featuring RISC-V Case Studies
Vladimir Herdt
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Enhanced Virtual Prototyping : Featuring RISC-V Case Studies
Vladimir Herdt
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Design for Testability, Debug and Reliability : Next Generation Measures Using Formal Techniques
Sebastian Huhn
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Design for Testability, Debug and Reliability : Next Generation Measures Using Formal Techniques
Sebastian Huhn
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Evolutionary Algorithms for VLSI CAD
Rolf Drechsler
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Binary Decision Diagrams : Theory and Implementation
Rolf Drechsler
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Architecture Exploration for Embedded Processors with LISA
Andreas Hoffmann
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Application Analysis Tools for ASIP Design : Application Profiling and Instruction-set Customization
Kingshuk Karuri
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C Compilers for ASIPs : Automatic Compiler Generation with LISA
Manuel Hohenauer
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C Compilers for ASIPs : Automatic Compiler Generation with LISA
Manuel Hohenauer
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Binary Decision Diagrams : Theory and Implementation
Rolf Drechsler
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