Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs PDF
by Brandon Noia, Krishnendu Chakrabarty
Description
This book describes innovative techniques to address the testing needs of 3D stacked integrated circuits (ICs) that utilize through-silicon-vias (TSVs) as vertical interconnects. The authors identify the key challenges facing 3D IC testing and present results that have emerged from cutting-edge research in this domain. Coverage includes topics ranging from die-level wrappers, self-test circuits, and TSV probing to test-architecture design, test scheduling, and optimization. Readers will benefit from an in-depth look at test-technology solutions that are needed to make 3D ICs a reality and commercially viable.
Information
-
Download - Immediately Available
- Format:PDF
- Publisher:Springer International Publishing
- Publication Date:19/11/2013
- Category:
- ISBN:9783319023786
Other Formats
- Hardback from £81.35
- Paperback / softback from £65.85
Information
-
Download - Immediately Available
- Format:PDF
- Publisher:Springer International Publishing
- Publication Date:19/11/2013
- Category:
- ISBN:9783319023786