On-Chip Networks Paperback
by Natalie D. Enright Jerger, Li-Shiuan Peh
Part of the Synthesis Lectures on Computer Architecture series
Paperback
Description
With the ability to integrate a large number of cores on a single chip, research into on-chip networks to facilitate communication becomes increasingly important.
On-chip networks seek to provide a scalable and high-bandwidth communication substrate for multi-core and many-core architectures.
High bandwidth and low latency within the on-chip network must be achieved while fitting within tight area and power budgets.
In this lecture, we examine various fundamental aspects of on-chip network design and provide the reader with an overview of the current state-of-the-art research in this field.
Information
-
Item not Available
- Format:Paperback
- Pages:141 pages, black & white illustrations
- Publisher:Morgan & Claypool Publishers
- Publication Date:01/06/2008
- Category:
- ISBN:9781598295849
Information
-
Item not Available
- Format:Paperback
- Pages:141 pages, black & white illustrations
- Publisher:Morgan & Claypool Publishers
- Publication Date:01/06/2008
- Category:
- ISBN:9781598295849
