Logic Locking : A Practical Approach to Secure Hardware
Dominik Sisejkovic
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A Computer-Aided Design and Synthesis Environment for Analog Integrated Circuits
Geert Van der Plas
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Symbolic Analysis for Automated Design of Analog Integrated Circuits
Georges Gielen
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A Computer-Aided Design and Synthesis Environment for Analog Integrated Circuits
Geert Van der Plas
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Digital Microfluidic Biochips : Design Automation and Optimization
Krishnendu Chakrabarty
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Systematic Modeling and Analysis of Telecom Frontends and Their Building Blocks
Piet Vanassche
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Systematic Modeling and Analysis of Telecom Frontends and their Building Blocks
Piet Vanassche
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Integrated System-Level Modeling of Network-on-Chip enabled Multi-Processor Platforms
Tim Kogel
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Integrated System-Level Modeling of Network-on-Chip enabled Multi-Processor Platforms
Tim Kogel
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Optimized ASIP Synthesis from Architecture Description Language Models
Oliver Schliebusch
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High-level Modeling and Synthesis of Analog Integrated Systems
Ewout S. J. Martens
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High-Level Modeling and Synthesis of Analog Integrated Systems
Ewout S. J. Martens
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Retargetable Processor System Integration into Multi-Processor System-on-Chip Platforms
Andreas Wieferink
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Retargetable Processor System Integration into Multi-Processor System-on-Chip Platforms
Andreas Wieferink
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Language-driven Exploration and Implementation of Partially Re-configurable ASIPs
Anupam Chattopadhyay
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Language-driven Exploration and Implementation of Partially Re-configurable ASIPs
Anupam Chattopadhyay
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Symbolic Analysis for Automated Design of Analog Integrated Circuits
Georges Gielen
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Symbolic Analysis for Automated Design of Analog Integrated Circuits
Georges Gielen
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Design and Testing of Digital Microfluidic Biochips
Yang Zhao
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Design and Testing of Digital Microfluidic Biochips
Yang Zhao
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Analog IC Reliability in Nanometer CMOS
Elie Maricau
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Systematic Design of Analog IP Blocks
Jan Vandenbussche
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Analog Layout Generation for Performance and Manufacturability
Koen Lampaert
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