Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs Paperback / softback
by Brandon Noia, Krishnendu Chakrabarty
Paperback / softback
Description
This book describes innovative techniques to address the testing needs of 3D stacked integrated circuits (ICs) that utilize through-silicon-vias (TSVs) as vertical interconnects.
The authors identify the key challenges facing 3D IC testing and present results that have emerged from cutting-edge research in this domain.
Coverage includes topics ranging from die-level wrappers, self-test circuits, and TSV probing to test-architecture design, test scheduling, and optimization.
Readers will benefit from an in-depth look at test-technology solutions that are needed to make 3D ICs a reality and commercially viable.
Information
-
Item not Available
- Format:Paperback / softback
- Pages:245 pages, 23 Tables, black and white; 115 Illustrations, color; 18 Illustrations, black and white;
- Publisher:Springer International Publishing AG
- Publication Date:23/08/2016
- Category:
- ISBN:9783319345345
Other Formats
- Hardback from £81.35
- PDF from £76.08
Information
-
Item not Available
- Format:Paperback / softback
- Pages:245 pages, 23 Tables, black and white; 115 Illustrations, color; 18 Illustrations, black and white;
- Publisher:Springer International Publishing AG
- Publication Date:23/08/2016
- Category:
- ISBN:9783319345345