Logic Locking : A Practical Approach to Secure Hardware
Dominik Sisejkovic
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Customizable Embedded Processors : Design Technologies and Applications
Paolo Ienne
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Code Optimization Techniques for Embedded Processors : Methods, Algorithms, and Tools
Rainer Leupers
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C Compilers for ASIPs : Automatic Compiler Generation with LISA
Manuel Hohenauer
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C Compilers for ASIPs : Automatic Compiler Generation with LISA
Manuel Hohenauer
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Code Optimization Techniques for Embedded Processors : Methods, Algorithms, and Tools
Rainer Leupers
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Architecture Exploration for Embedded Processors with LISA
Andreas Hoffmann
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Multiprocessor Systems on Chip : Design Space Exploration
Torsten Kempf
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Multiprocessor Systems on Chip : Design Space Exploration
Torsten Kempf
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Application Analysis Tools for ASIP Design : Application Profiling and Instruction-set Customization
Kingshuk Karuri
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Application Analysis Tools for ASIP Design : Application Profiling and Instruction-set Customization
Kingshuk Karuri
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Retargetable Code Generation for Digital Signal Processors
Rainer Leupers
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Code Optimization Techniques for Embedded Processors : Methods, Algorithms, and Tools
Rainer Leupers
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Architecture Exploration for Embedded Processors with LISA
Andreas Hoffmann
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Retargetable Compiler Technology for Embedded Systems : Tools and Applications
Rainer Leupers
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Multiprocessor Systems on Chip : Design Space Exploration
Torsten Kempf
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C Compilers for ASIPs : Automatic Compiler Generation with LISA
Manuel Hohenauer
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Application Analysis Tools for ASIP Design : Application Profiling and Instruction-set Customization
Kingshuk Karuri
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Integrated System-Level Modeling of Network-on-Chip enabled Multi-Processor Platforms
Tim Kogel
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Integrated System-Level Modeling of Network-on-Chip enabled Multi-Processor Platforms
Tim Kogel
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Optimized ASIP Synthesis from Architecture Description Language Models
Oliver Schliebusch
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Optimized ASIP Synthesis from Architecture Description Language Models
Oliver Schliebusch
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Architecture Exploration for Embedded Processors with LISA
Andreas Hoffmann
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Retargetable Processor System Integration into Multi-Processor System-on-Chip Platforms
Andreas Wieferink
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